1) Field of the Invention
This invention relates to a manufacturing process for a semiconductor device, and more particularly to a process for forming a planar spin-on-glass layer.
2) Description of the Prior Art
As the scale of integration increases and device dimensions decrease, the performance of VLSI chips is limited by interconnection capabilities. For example, VLSI technology for 1-micrometer processes requires a greater control on the materials and techniques that are well beyond that of only slightly larger 2-micrometer processes. While the dimension is scaled in half, the degree of difficulty can increase in the range of 5 to 10 times. Furthermore, as the number of layers of interconnection increases, even more stringent requirements are placed on the interlayer dielectric separating the metal layers.
Multi-layer metallization is required to provide improved interconnection capabilities for increased circuit speed, circuit density, as well as design flexibility for customized applications. However, the surface topography generated by multi-layer processes causes serious difficulties for subsequent processing steps such as lithography, deposition and etching. It also degrades device reliability by causing poor step coverage, metal migration, and induced cracking. Therefore, surface planarization is essential for continual progress in integration.
Historically, the interlayer dielectric has been a chemical vapor deposition (CVD) oxide that has produced a less than conformal coating. With decreased metal spacing, this deposition method produces undesirable voids between the tight metal lines. The severe topography induced by multi-layer interconnects and conformal coatings increases the difficulties in metal deposition. However, many different approaches have been studied and used to give a more planar dielectric layer, such as glass flow and reflow, bias sputter quartz, lift-off, etch-back processes and spin-on-dielectric.
Among the several dielectric planarization schemes available, spin-on glass (SOG) offers the greater potential and flexibility as a planarizing medium for the inter metal dielectric. SOG is a smoothing dielectric applied by spin coating that fills the spaces in the smaller geometry. The general composition of SOG materials range from silicates (Si--O) framework to polysiloxanes which contain varying concentrations of methyl and phenyl groups.
Silicate materials, either undoped or doped, generally solidify to a rigid film at a rather low temperature and crack easily for thicker coatings, particularly over surface topography. The polysiloxane materials, with various attach organic groups, were developed to improve the coating characteristics as well as to prevent crack formation for thicker coatings. However, silicate and siloxane films can not be formed thick enough to adequately planarize (smooth) the substrate surface because voids from the SOG layer form and the thick SOG layers crack. Because of these shortcomings, thinner SOG layers were tried, but the thin layers also have drawbacks.
When thin layers of SOG, in the range of 1000 .ANG. and thicker, are used, a CVD dielectric is needed to form the isolation between the metal layers. As a result of several problems, such as adhesion loss and degradation of film stability, a sandwich scheme with a layer of SOG encapsulated between two layers of CVD dielectric is effective in obtaining planarization without the problems exhibited by a single layer of CVD and a single layer of SOG. A first dielectric layer is the bottom layer and serves as an adhesion and hillock suppresser layer and should prevent the SOG from coming in contact with the metal. SOG is the middle layer and serves primarily as the planarization layer. Finally a second CVD dielectric is the third layer and serves as an isolation layer.
Theoretically, the SOG layer should transform the severe topography of the device into a smooth one thus allowing the third layer to have a good step coverage and good isolation. However, the SOG materials generally used have problems associated with them. The thickness at which the SOG materials crack is largely dependent on the chemical composition.
As a result of the a thick film's tendency to crack, the planarity of a single thin SOG spin application is generally not adequate, therefore at normally two or more coats applied in sequence are necessary to obtain satisfactory planarity.
A major problem with SOG planarization layers is that the SOG layers do not readily fill in between closely spaced lines and the resulting surface is not smooth. This less than planar SOG surface can cause problems and voids in subsequent layers. For example, voids can form in overlying metal layers. Metal lines are formed over field oxide regions in the substrate. Next, a dielectric layer is formed over the SOG and metal lines. Then a via is formed through the dielectric and SOG layers over the metal lines. A metal layer is formed over the dielectric layer and SOG layer over the metal lines. Sometimes where the SOG layer is not planar between the metal lines, the overlying metal layer has voids. Voids in the metal layer cause circuit failure and reliability problems.
In addition, non-planar SOG layers can cause poison via problems. In the via, the SOG layer is in direct contact with the metal layer. Especially when excess water is present in the SOG, the SOG corrodes the metal layer causing metal contact problems called poison via problems.
Another disadvantage with the current spin-on-glass process is that the SOG layer must be very thick to provide a smooth planar surface over the rough substrate topographies. These thick SOG layers are a disadvantage because they make the electrical circuits larger and therefore slower. Moreover, thick SOG layers are not as structurally strong as thin layers. Furthermore, thick SOG layers are more prone to the void problems described above.
Thick SOG layers also make the via poison problems worse. Interconnections are required between the upper and lower conductive lines, requiring the use of contacts or vias. In the vias, the SOG is in direct contact with the metal interconnects. If excess water is present in the SOG, problems such as via poisoning can occur. The thicker the SOG layer, the greater the chance of poison via problems because of the greater amount of moisture in the thick SOG layer and the greater metal surface area.
There is a need for a SOG process which simultaneously can: (1) provide improved planarity with thinner SOG layers, (2) can be formed between closely spaced structure without forming voids in overlying layers, and (3) can reduce the poison via problem.